Design and implementation of a synchronous Hardware Performance Monitor for a RISC-V space-oriented processor

1. Jiménez Arribas, M.
2. Martínez Hellín, A.
3. Prieto Mateo, M.
4. Gamino del Río, I.
5. Fernández Gallego, A.
6. Rodríguez Polo, Ó.
7. da Silva, A.
8. Parra, P.
9. Sánchez, S.

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DOI: 10.1016/J.MICPRO.2024.105132 GOOGLE SCHOLAR lock_openOpen access editor

Data source: Scopus