Design and Implementation of a Fault Tolerant QPSK Transceiver for SRAM-Based FPGA Satellite Applications

Resumen

In space applications, radio communications are a vital technology for the transmission of data back to ground level, and of these the QPSK modulation scheme has been used in some applications, with trends towards more flexible systems such as software-defined-radio. As such the modulation components have been gradually shifting from the analogue space to the digital space, with recent years showing increases of FPGA based implementations of these systems, enabling an even greater degree of flexibility. Lately, commercial off-the-shelf (COTS) based satellite systems have been increasing in use, particularly in smaller satellites, where financial, power and area budgets are limited. A current trend in these COTS components is to increase component density and functionalities. This however, makes the devices more susceptible to the effects of radiation-induced errors caused by ionising radiation which is prevalent in the space environment. Energetic particles can collide with the device transistors and can lead to effects such as single event upsets (SEUs) which is an error that modifies the memory cells. Without design consideration regarding these effects, COTS components cannot be used by themselves. The effects of radiation can be mitigated using costly manufacturing processes. However, low-cost COTS based projects likely cannot afford these expensive pieces of hardware, therefore a radiation hardening by design approach is usually followed. For short development times and large designs, a modular redundancy technique can be used, which is a general approach but uses a large amount of area and power resources. however, the general approaches are not always feasible, therefore another option is to study the system's properties and behavior to devise ad-hoc protection schemes with lower overhead. It is this method that is being proposed in this thesis: a modular approach is taken in that the design is broken up into small sub-components, with each considered individually to design novel custom ad-hoc radiation protection techniques combined with traditional solutions, of a QPSK-based transceiver, implemented in COTS hardware. The proposed protection techniques presented are: • An ad-hoc protection for the QPSK Modulator system exploiting the trigonometric properties of the system output. • An ad-hoc protection technique for the QPSK demodulator using a reduced DMR and trigonometric based protections of a CORDIC based DDS system. • An ad-hoc protection technique for a CIC interpolator (up-conversion) which calculates the predicted output in parallel to the main circuit. • An ad-hoc protection technique for a CIC interpolator that analyses the filter output. • An SEU accumulation error prevention scrubbing technique, utilizing novel testing methodologies, which scrubs FPGA configuration memory based on the potential for causing errors, when SEUs exist but cause no observable error. These techniques have been developed to provide a trade-o_ between the resource overhead required for introducing soft error mitigation and the end result of error detection rate. The effectiveness of the above techniques have been evaluated through extensive testing including fault injection campaigns, and in terms of resource usage and error detection rate. The scrubbing methodology has been verified by using an FPGA based design to provide data, and a computer simulation to explore the effects and performance. The construction of the QPSK based transceiver is used as an example of how to build up the final system combining a flexible set of traditional techniques and novel ad-hoc approaches.